N. Pete Sedcole, Justin S. Wong, Peter Y. K. Cheung. Modelling and compensating for clock skew variability in FPGAs. In Tarek A. El-Ghazawi, Yao-Wen Chang, Juinn-Dar Huang, Proshanta Saha, editors, 2008 International Conference on Field-Programmable Technology, FPT 2008, Taipei, Taiwan, December 7-10, 2008. pages 217-224, IEEE, 2008. [doi]
@inproceedings{SedcoleWC08-0,
title = {Modelling and compensating for clock skew variability in FPGAs},
author = {N. Pete Sedcole and Justin S. Wong and Peter Y. K. Cheung},
year = {2008},
doi = {10.1109/FPT.2008.4762386},
url = {http://dx.doi.org/10.1109/FPT.2008.4762386},
researchr = {https://researchr.org/publication/SedcoleWC08-0},
cites = {0},
citedby = {0},
pages = {217-224},
booktitle = {2008 International Conference on Field-Programmable Technology, FPT 2008, Taipei, Taiwan, December 7-10, 2008},
editor = {Tarek A. El-Ghazawi and Yao-Wen Chang and Juinn-Dar Huang and Proshanta Saha},
publisher = {IEEE},
isbn = {978-1-4244-2796-3},
}