Automated design of a 10-bit, 80MSPS WLAN DAC for linearity and low-area

A. Seedher, Preetam Tadeparthy, K. A. S. Satheesh, V. T. Anuroop. Automated design of a 10-bit, 80MSPS WLAN DAC for linearity and low-area. In International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan. pages 5545-5548, IEEE, 2005. [doi]

Abstract

Abstract is missing.