Anuja Sehgal, Krishnendu Chakrabarty. Optimization of Dual-Speed TAM Architectures for Efficient Modular Testing of SOCs. IEEE Transactions on Computers, 56(1):120-133, 2007. [doi]
@article{SehgalC07,
title = {Optimization of Dual-Speed TAM Architectures for Efficient Modular Testing of SOCs},
author = {Anuja Sehgal and Krishnendu Chakrabarty},
year = {2007},
doi = {10.1109/TC.2007.15},
url = {http://doi.ieeecomputersociety.org/10.1109/TC.2007.15},
tags = {optimization, architecture, testing},
researchr = {https://researchr.org/publication/SehgalC07},
cites = {0},
citedby = {0},
journal = {IEEE Transactions on Computers},
volume = {56},
number = {1},
pages = {120-133},
}