A Bit-Serial, Compute-in-SRAM Design Featuring Hybrid-Integrating ADCs and Input Dependent Binary Scaled Precharge Eliminating DACs for Energy-Efficient DNN Inference - researchr publication

researchr

You are not signed in
Sign in
Sign up

Rishabh Sehgal, Tanmay Thareja, Shanshan Xie, Can Ni, Jaydeep P. Kulkarni. A Bit-Serial, Compute-in-SRAM Design Featuring Hybrid-Integrating ADCs and Input Dependent Binary Scaled Precharge Eliminating DACs for Energy-Efficient DNN Inference. J. Solid-State Circuits, 58(7):2109-2124, 2023. [doi]

Abstract is missing.

runs on WebDSL