Memory Array Demonstration of fully integrated 1T-1C FeFET concept with separated ferroelectric MFM device in interconnect layer

Konrad Seidel, David Lehninger, Raik Hoffmann, Tarek Ali, Maximilian Lederer, Ricardo Revello, Konstantin Mertens, Kati Biedermann, Yukai Shen, Defu Wang, Matthias Landwehr, Andreas Heinig, Thomas Kämpfe, Hannes Mähne, Kerstin Bernert, Steffen Thiem. Memory Array Demonstration of fully integrated 1T-1C FeFET concept with separated ferroelectric MFM device in interconnect layer. In IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022. pages 355-356, IEEE, 2022. [doi]

Abstract

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