Ioannis Seitanidis, Giorgos Dimitrakopoulos, Pavlos M. Mattheakis, Laurent Masse-Navette, David G. Chinnery. Timing-Driven and Placement-Aware Multibit Register Composition. IEEE Trans. on CAD of Integrated Circuits and Systems, 38(8):1501-1514, 2019. [doi]
@article{SeitanidisDMMC19,
title = {Timing-Driven and Placement-Aware Multibit Register Composition},
author = {Ioannis Seitanidis and Giorgos Dimitrakopoulos and Pavlos M. Mattheakis and Laurent Masse-Navette and David G. Chinnery},
year = {2019},
doi = {10.1109/TCAD.2018.2852740},
url = {https://doi.org/10.1109/TCAD.2018.2852740},
researchr = {https://researchr.org/publication/SeitanidisDMMC19},
cites = {0},
citedby = {0},
journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
volume = {38},
number = {8},
pages = {1501-1514},
}