Generalized Power-Delay Metrics in Deep Submicron CMOS Designs

Dipanjan Sengupta, Resve Saleh. Generalized Power-Delay Metrics in Deep Submicron CMOS Designs. IEEE Trans. on CAD of Integrated Circuits and Systems, 26(1):183-189, 2007. [doi]

Authors

Dipanjan Sengupta

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Resve Saleh

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