Hyeongmin Seo, Jiyun Han, Kyungmin Kim, Baek-Jin Lim, Eunseok Shin, Youngdon Choi, Hyungjong Ko, Jung Hwan Choi, Sang Hyun Lee, Changsik Yoo, Jaeduk Han. A 12-Gb/s Baud-Rate Clock and Data Recovery With 75% Phase-Detection Probability by Precoding and Integration-Hold-Reset Frontend. IEEE Trans. Circuits Syst. II Express Briefs, 70(2):411-415, February 2023. [doi]
Abstract is missing.