Sanjit A. Seshia, Randal E. Bryant, Kenneth S. Stevens. Modeling and Verifying Circuits Using Generalized Relative Timing. In 11th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2005), 14-16 March 2005, New York, NY, USA. pages 98-108, IEEE Computer Society, 2005. [doi]
Abstract is missing.