High speed and efficient area optimal ate pairing processor implementation over BN and BLS12 curves on FPGA - researchr publication related

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Anissa Sghaier, Zeghid Medien, Loubna Ghammam, Sylvain Duquesne, Mohsen Machhout, Hassan Yousif Ahmed. High speed and efficient area optimal ate pairing processor implementation over BN and BLS12 curves on FPGA. Microprocessors and Microsystems, 61:227-241, 2018. [doi]

The following publications are possibly variants of this publication:

Area-Efficient Hardware Implementation of the Optimal Ate Pairing over BN curvesAnissa Sghaier, Loubna Ghammam, Zeghid Medien, Sylvain Duquesne, Mohsen Machhout. iacr, 2015:1100, 2015. [doi]

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