Optimized Counter-Based Multi-Ported Memory Architectures for Next-Generation FPGAs

S. Navid Shahrouzi, Darshika G. Perera. Optimized Counter-Based Multi-Ported Memory Architectures for Next-Generation FPGAs. In 31st IEEE International System-on-Chip Conference, SOCC 2018, Arlington, VA, USA, September 4-7, 2018. pages 106-111, IEEE, 2018. [doi]

Abstract

Abstract is missing.