Simulation and design of asymmetric vertical cladding layer-based tunneling field effect transistors with improved DC and Analog/RF performance

Chan Shan, Ying Liu. Simulation and design of asymmetric vertical cladding layer-based tunneling field effect transistors with improved DC and Analog/RF performance. Microelectronics Journal, 172:107145, 2026. [doi]

Abstract

Abstract is missing.