Zhiyuan Shao, Ruoshi Li, Diqing Hu, Xiaofei Liao, Hai Jin 0001. Improving Performance of Graph Processing on FPGA-DRAM Platform by Two-level Vertex Caching. In Kia Bazargan, Stephen Neuendorffer, editors, Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA 2019, Seaside, CA, USA, February 24-26, 2019. pages 320-329, ACM, 2019. [doi]
Abstract is missing.