An FPGA-Based Reconfigurable Accelerator for Low-Bit DNN Training

Haikuo Shao, Jinming Lu, Jun Lin, Zhongfeng Wang. An FPGA-Based Reconfigurable Accelerator for Low-Bit DNN Training. In IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2021, Tampa, FL, USA, July 7-9, 2021. pages 254-259, IEEE, 2021. [doi]

Abstract

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