Nishtha Sharma, Andrew Marshall, Jonathan Bird. Verilog - A compact model of a ME-MTJ based XNOR/NOR gate. In IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2017, Newport, RI, USA, July 25-26, 2017. pages 162-167, IEEE, 2017. [doi]
@inproceedings{SharmaMB17,
title = {Verilog - A compact model of a ME-MTJ based XNOR/NOR gate},
author = {Nishtha Sharma and Andrew Marshall and Jonathan Bird},
year = {2017},
doi = {10.1109/NANOARCH.2017.8053716},
url = {http://doi.ieeecomputersociety.org/10.1109/NANOARCH.2017.8053716},
researchr = {https://researchr.org/publication/SharmaMB17},
cites = {0},
citedby = {0},
pages = {162-167},
booktitle = {IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2017, Newport, RI, USA, July 25-26, 2017},
publisher = {IEEE},
isbn = {978-1-5090-6037-5},
}