SEU Tolerant Robust Latch Design

Mohammed Shayan, Virendra Singh, Adit D. Singh, Masahiro Fujita. SEU Tolerant Robust Latch Design. In Hafizur Rahaman, Sanatan Chattopadhyay, Santanu Chattopadhyay, editors, Progress in VLSI Design and Test - 16th International Symposium, VDAT 2012, Shibpur, India, July 1-4, 2012. Proceedings. Volume 7373 of Lecture Notes in Computer Science, pages 223-232, Springer, 2012. [doi]

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