Yi-Chun Shih, Chia-Fu Lee, Yen-An Chang, Po-Hao Lee, Hon-Jarn Lin, Yu-Lin Chen, Ku-Feng Lin, Ta-Ching Yeh, Hung-Chang Yu, Harry Chuang, Yu-Der Chih, Jonathan Chang. Logic Process Compatible 40NM 16MB, Embedded Perpendicular-MRAM with Hybrid-Resistance Reference, Sub-μA Sensing Resolution, and 17.5NS Read Access Time. In 2018 IEEE Symposium on VLSI Circuits, Honolulu, HI, USA, June 18-22, 2018. pages 79-80, IEEE, 2018. [doi]
Abstract is missing.