Hsiu-Chuan Shih, Pei-Wen Luo, Jen-Chieh Yeh, Shu-Yen Lin, Ding-Ming Kwai, Shih-Lien Lu, Andre Schaefer, Cheng-Wen Wu. DArT: A Component-Based DRAM Area, Power, and Timing Modeling Tool. IEEE Trans. on CAD of Integrated Circuits and Systems, 33(9):1356-1369, 2014. [doi]
Abstract is missing.