An Area-Efficient Iterative Modified-Booth Multiplier Based on Self-Timed Clocking

Myoung-Cheol Shin, Se-Hyeon Kang, In-Cheol Park. An Area-Efficient Iterative Modified-Booth Multiplier Based on Self-Timed Clocking. In 19th International Conference on Computer Design (ICCD 2001), VLSI in Computers and Processors, 23-26 September 2001, Austin, TX, USA, Proceedings. pages 511-512, IEEE Computer Society, 2001.

Abstract

Abstract is missing.