Jongshin Shin, Jaehyun Park, Bongjin Kim, Jongjae Ryu, Chiwon Kim, Jiyoung Kim, Seung-Hee Yang, Hyungoo Kim, Jaewhui Kim. A 65nm 3.4Gbps HDMI TX PHY with supply-regulated dual-tuning PLL and blending multiplexer. In Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, CICC 2008, DoubleTree Hotel, San Jose, California, USA, September 21-24, 2008. pages 237-240, IEEE, 2008. [doi]
@inproceedings{ShinPKRKKYKK08,
title = {A 65nm 3.4Gbps HDMI TX PHY with supply-regulated dual-tuning PLL and blending multiplexer},
author = {Jongshin Shin and Jaehyun Park and Bongjin Kim and Jongjae Ryu and Chiwon Kim and Jiyoung Kim and Seung-Hee Yang and Hyungoo Kim and Jaewhui Kim},
year = {2008},
doi = {10.1109/CICC.2008.4672067},
url = {http://dx.doi.org/10.1109/CICC.2008.4672067},
researchr = {https://researchr.org/publication/ShinPKRKKYKK08},
cites = {0},
citedby = {0},
pages = {237-240},
booktitle = {Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, CICC 2008, DoubleTree Hotel, San Jose, California, USA, September 21-24, 2008},
publisher = {IEEE},
isbn = {978-1-4244-2018-6},
}