Design and implementation of an embedded 512KB level 2 cache subsystem - researchr publication authors

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Jinuk Luke Shin, Bruce Petrick, Howard Levy, Jinseung Son, Mandeep Singh, Vikas Mathur, Jung-Cheng Yeh, Heesung Choi, Vishal Gupta, Tom Ziaja, Ana Sonia Leon. Design and implementation of an embedded 512KB level 2 cache subsystem. In Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, CICC 2004, Orlando, FL, USA, October 2004. pages 349-352, IEEE, 2004. [doi]

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