Design and implementation of an embedded 512KB level 2 cache subsystem

Jinuk Luke Shin, Bruce Petrick, Howard Levy, Jinseung Son, Mandeep Singh, Vikas Mathur, Jung-Cheng Yeh, Heesung Choi, Vishal Gupta, Tom Ziaja, Ana Sonia Leon. Design and implementation of an embedded 512KB level 2 cache subsystem. In Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, CICC 2004, Orlando, FL, USA, October 2004. pages 349-352, IEEE, 2004. [doi]

@inproceedings{ShinPLSSMYCGZL04,
  title = {Design and implementation of an embedded 512KB level 2 cache subsystem},
  author = {Jinuk Luke Shin and Bruce Petrick and Howard Levy and Jinseung Son and Mandeep Singh and Vikas Mathur and Jung-Cheng Yeh and Heesung Choi and Vishal Gupta and Tom Ziaja and Ana Sonia Leon},
  year = {2004},
  doi = {10.1109/CICC.2004.1358818},
  url = {https://doi.org/10.1109/CICC.2004.1358818},
  researchr = {https://researchr.org/publication/ShinPLSSMYCGZL04},
  cites = {0},
  citedby = {0},
  pages = {349-352},
  booktitle = {Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, CICC 2004, Orlando, FL, USA, October 2004},
  publisher = {IEEE},
  isbn = {0-7803-8495-4},
}