Gireesh Shrimali, Keshab K. Parhi. High-speed arithmetic coder/decoder architectures. In IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP '93, Minneapolis, Minnesota, USA, April 27-30, 1993. pages 361-364, IEEE Computer Society, 1993. [doi]
@inproceedings{ShrimaliP93-0,
title = {High-speed arithmetic coder/decoder architectures},
author = {Gireesh Shrimali and Keshab K. Parhi},
year = {1993},
doi = {10.1109/ICASSP.1993.319130},
url = {http://doi.ieeecomputersociety.org/10.1109/ICASSP.1993.319130},
researchr = {https://researchr.org/publication/ShrimaliP93-0},
cites = {0},
citedby = {0},
pages = {361-364},
booktitle = {IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP '93, Minneapolis, Minnesota, USA, April 27-30, 1993},
publisher = {IEEE Computer Society},
isbn = {0-7803-7402-9},
}