FPGA accelerated multipliers over binary composite fields constructed via low hamming weight irreducible polynomials

Chang Shu, Soonhak Kwon, Kris Gaj. FPGA accelerated multipliers over binary composite fields constructed via low hamming weight irreducible polynomials. IET Computers & Digital Techniques, 2(1):6-11, 2008. [doi]

Authors

Chang Shu

This author has not been identified. Look up 'Chang Shu' in Google

Soonhak Kwon

This author has not been identified. Look up 'Soonhak Kwon' in Google

Kris Gaj

This author has not been identified. Look up 'Kris Gaj' in Google