Saroja V. Siddamal, R. M. Banakar, B. C. Jinaga. Design of High-Speed Floating Point Multiplier. In 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008. pages 285-289, IEEE Computer Society, 2008. [doi]
@inproceedings{SiddamalBJ08,
title = {Design of High-Speed Floating Point Multiplier},
author = {Saroja V. Siddamal and R. M. Banakar and B. C. Jinaga},
year = {2008},
doi = {10.1109/DELTA.2008.19},
url = {http://doi.ieeecomputersociety.org/10.1109/DELTA.2008.19},
tags = {C++, design},
researchr = {https://researchr.org/publication/SiddamalBJ08},
cites = {0},
citedby = {0},
pages = {285-289},
booktitle = {4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008},
publisher = {IEEE Computer Society},
}