12 bit 3.072 GS/s 32-way time-interleaved pipelined ADC with digital background calibration for wideband fully digital receiver application in 65 nm complementary metal-oxide-semiconductor

Waleed Hussain Siddiqui, Goang Seong Choi. 12 bit 3.072 GS/s 32-way time-interleaved pipelined ADC with digital background calibration for wideband fully digital receiver application in 65 nm complementary metal-oxide-semiconductor. IET Circuits, Devices & Systems, 14(2):182-191, 2020. [doi]

Abstract

Abstract is missing.