The Interlocking Bus Network for Fault-Tolerant Processor Arrays

Markus Siegle, Douglas S. Reeves, Krzysztof Kozminski. The Interlocking Bus Network for Fault-Tolerant Processor Arrays. In Mario Dal Cin, Wolfgang Hohl, editors, Fault-Tolerant Computing Systems, Tests, Diagnosis, Fault Treatment, 5th International GI/ITG/GMA Conference, Nürnberg, Germany, September 25-27, 1991, Proceedings. Volume 283 of Informatik-Fachberichte, pages 348-359, Springer, 1991.

Abstract

Abstract is missing.