Abstract is missing.
- Responsive Systems: A Marriage Betwenn Real time and Fault TolenranceMiroslaw Malek. 1-17
- Self-Diagnosis, Reconfiguration and Recovery in the Dynamical Reconfigurable Multiprocessor Systemn DAMPAndreas Bauch, Erik Maehle. 18-29
- Efficient Recovery of Statically Redundant SystemsKlaus Echtle, Arnold Niedermaier. 30-41
- Implementations and Extensions of the Conversation ConceptFelicita Di Giandomenico, Lorenzo Strigini. 42-53
- Concurrent Erro Detection Using Watchdog ProcessorsEdgar Michel, Wolfgang Hohl. 54-64
- SEES: Simulation Environment for Dynamic EvaluationWojciech E. Kozlowski, Henryk Krawczyk. 65-76
- An Expert System Shell for the Diagnosis of Parallel ComputersThomas Philipp. 77-87
- Adaptive Fault Tolerance in Multi-Computer Systems Using Data Compation and Two-Level VotingAndreas Stopp. 88-99
- The Electoral District Strategy of Replicated Data in Distrinuted SystemsBernd Freisleben, Hans-Henning Koch, Oliver E. Theel. 100-111
- Adaptive Byzantine Agreement in O(t) PhasesBirgit Baum-Waidner. 112-123
- Scan Technology at WorkR. G. Bennetts. 124-135
- Emulation of Scan Paths in Sequential Circuit SynthesisBernhard Eschermann, Hans-Joachim Wunderlich. 136-147
- Testing of Fault-Tolerant HardwareIrith Pomeranz, Sudhakar M. Reddy. 148-159
- Coding Redundancy for Combinational Switching CircuitsM. Bartel. 160-170
- Optimal Error Detection Circuits for Sequential Circuits with Observable StatesMichael Gössel. 171-180
- Efficient Encoding? Decoding Circuitry for Systematic Unidirectional Error-Detecting CodesStanislaw J. Piestrak. 181-192
- Acceleration of RAM-Tests with Associative Pattern Recognition MethodsDjamshid Tavangarian, Chr. Elm. 193-204
- Truth Table Verification for one-Dimensional CMOS ILA sVlad. Hert, A. J. van de Goor. 205-216
- On Modelling and Analysis of Latency Problem in Fault-Tolerant SystemsBen Soh, Tharam S. Dillon. 217-228
- Fixed Point Iteration in Availability ModelingLorrie A. Tomek, Kishor S. Trivedi. 229-240
- Resource Allocation for Distributed Systems with Fault Tolerant NodesYennun Huang, Satish K. Tripathi. 241-252
- Performability Evaluation of a Fault-Tolerant Multiprocessor Architecture Using Stochastic Petri NetsRoland Lepold. 253-265
- Special Features of a Computer-Based German Reactor Protection SystemH. D. Fischer. 266-288
- Fault-Tolerant Process Interface with Programmable ControllersHerbert Barthel. 289-299
- A Simulation-Based Study of a Triple Modular Redundant System Using DEFENDKumar K. Goswami, Ravishankar K. Iyer. 300-311
- A Reconfigurable Instruction Systolic ArrayMichael Phieler, Manfred Schimmler, Hartmut Schmeck. 312-323
- A New Approach for Designing Fault-Tolerant Array ProcessorsPeter Poechmueller, Manfred Glesner. 324-331
- A Performable BSM ArchitectureAndrea Bondavalli, M. Mannocci, F. Tarini, P. Zini, L. Nardone, Luca Simoncini. 332-347
- The Interlocking Bus Network for Fault-Tolerant Processor ArraysMarkus Siegle, Douglas S. Reeves, Krzysztof Kozminski. 348-359
- A Fault Tolerant Interconnection Network for Memory-Coupled Multiprocessor SystemsU. Hildebrand. 360-371
- Star Type Networks with Fault ToleranceWinfrid G. Schneeweiss, F. P. Holtmann. 372-382
- A Classification of Software Diversity Degrees Induced by an Analysis of Fault Types to be ToleratedFrancesca Saglietti. 383-395
- Optimal Design of Checks for Error Detection and Location in Fault Tolerant Multiprocessors SystemsRamesh K. Sitaraman, Niraj K. Jha. 396-406
- Testing Fault-Tolerant Protocols by Heristic Fault InjectionYinong Chen, Klaus Echtle, Winfried Görke. 407-418
- A Practical Approach for a Fault-Tolerant Massively Paralle ComputerM. Becker, Friedrich Lücking. 419-424