High-Performance Decoding of Variable-Length Memory Data Packets for FPGA Stream Processing

Roberto Sierra, Filippo Mangani, Carlos Carreras, Gabriel Caffarena. High-Performance Decoding of Variable-Length Memory Data Packets for FPGA Stream Processing. In Ioannis Sourdis, Christos-Savvas Bouganis, Carlos Álvarez 0001, Leonel Toledo, Pedro Valero-Lara, Xavier Martorell, editors, 29th International Conference on Field Programmable Logic and Applications, FPL 2019, Barcelona, Spain, September 8-12, 2019. pages 307-313, IEEE, 2019. [doi]

Abstract

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