Impact of Device Architecture and Gate Stack Processing on the Low-Frequency Noise of Silicon Nanowire Transistors

Eddy Simoen, Alberto Vinicius Oliveira, Anabela Veloso, Adrian Vaisman Chasin, Romain Ritzenthaler, Hans Mertens, Naoto Horiguchi, Cor Claeys. Impact of Device Architecture and Gate Stack Processing on the Low-Frequency Noise of Silicon Nanowire Transistors. In 13th IEEE International Conference on ASIC, ASICON 2019, Chongqing, China, October 29 - November 1, 2019. pages 1-4, IEEE, 2019. [doi]

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