Instruction-based delay fault self-testing of pipelined processor cores - researchr publication

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Virendra Singh, Michiko Inoue, Kewal K. Saluja, Hideo Fujiwara. Instruction-based delay fault self-testing of pipelined processor cores. In International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan. pages 5686-5689, IEEE, 2005. [doi]

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