On optimizing VLSI testing for product quality using die-yield prediction

Adit D. Singh, C. Mani Krishna. On optimizing VLSI testing for product quality using die-yield prediction. IEEE Trans. on CAD of Integrated Circuits and Systems, 12(5):695-709, 1993. [doi]

@article{SinghK93,
  title = {On optimizing VLSI testing for product quality using die-yield prediction},
  author = {Adit D. Singh and C. Mani Krishna},
  year = {1993},
  doi = {10.1109/43.277614},
  url = {http://doi.ieeecomputersociety.org/10.1109/43.277614},
  tags = {optimization, testing, C++},
  researchr = {https://researchr.org/publication/SinghK93},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
  volume = {12},
  number = {5},
  pages = {695-709},
}