Rohan Sinha, Bhawana Singh Nirwan, M. S. Hashmi. A new row decoding architecture for fast wordline charging in NOR type Flash memories. In 19th International Symposium on VLSI Design and Test, VDAT 2015, Ahmedabad, India, June 26-29, 2015. pages 1-5, IEEE, 2015. [doi]
Abstract is missing.