Naran Sirisantana, Kaushik Roy 0001. A time borrowing selectively clocked skewed logic for high-performance circuits in scaled technologies. In José E. Franca, Rudolf Koch, editors, ESSCIRC 2003 - 29th European Solid-State Circuits Conference, Estoril, Portugal, September 16-18, 2003. pages 181-184, IEEE, 2003. [doi]
@inproceedings{SirisantanaR03-0, title = {A time borrowing selectively clocked skewed logic for high-performance circuits in scaled technologies}, author = {Naran Sirisantana and Kaushik Roy 0001}, year = {2003}, doi = {10.1109/ESSCIRC.2003.1257102}, url = {https://doi.org/10.1109/ESSCIRC.2003.1257102}, researchr = {https://researchr.org/publication/SirisantanaR03-0}, cites = {0}, citedby = {0}, pages = {181-184}, booktitle = {ESSCIRC 2003 - 29th European Solid-State Circuits Conference, Estoril, Portugal, September 16-18, 2003}, editor = {José E. Franca and Rudolf Koch}, publisher = {IEEE}, isbn = {0-7803-7995-0}, }