Hardware transactional memory architecture with adaptive version management for multi-processor FPGA platforms - researchr publication

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Jeevan Sirkunan, Chia Yee Ooi, Nasir Shaikh-Husin, Yuan Wen Hau, Muhammad N. Marsono. Hardware transactional memory architecture with adaptive version management for multi-processor FPGA platforms. Journal of Systems Architecture, 73:42-52, 2017. [doi]

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