Cycle-time aware architecture synthesis of custom hardware accelerators - researchr publication authors

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Mukund Sivaraman, Shail Aditya. Cycle-time aware architecture synthesis of custom hardware accelerators. In Shuvra S. Bhattacharyya, Trevor N. Mudge, Wayne Wolf, Ahmed Amine Jerraya, editors, Proceedings of the International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES 2002, Greenoble, France, October 8-11, 2002. pages 35-42, ACM, 2002. [doi]

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