High-Level Synthesis Design Flow for HEVC Intra Encoder on SoC-FPGA - researchr publication

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Panu Sjovall, Janne Virtanen, Jarno Vanne, Timo D. Hämäläinen. High-Level Synthesis Design Flow for HEVC Intra Encoder on SoC-FPGA. In 2015 Euromicro Conference on Digital System Design, DSD 2015, Madeira, Portugal, August 26-28, 2015. pages 49-56, IEEE Computer Society, 2015. [doi]

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