24.3 A 36.8 2b-TOPS/W self-calibrating GPS accelerator implemented using analog calculation in 65nm LP CMOS

Skylar Skrzyniarz, Laura Fick, Jinal Shah, Yejoong Kim, Dennis Sylvester, David Blaauw, David Fick, Michael B. Henry. 24.3 A 36.8 2b-TOPS/W self-calibrating GPS accelerator implemented using analog calculation in 65nm LP CMOS. In 2016 IEEE International Solid-State Circuits Conference, ISSCC 2016, San Francisco, CA, USA, January 31 - February 4, 2016. pages 420-422, IEEE, 2016. [doi]

Abstract

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