A fully-integrated Wienbridge topology for ultra-low-power 86ppm/°C 65nm CMOS 6MHz clock reference with amplitude regulation - researchr publication authors

researchr

You are not signed in
Sign in
Sign up

Valentijn De Smedt, Pieter De Wit, Wim Vereecken, Michiel Steyaert. A fully-integrated Wienbridge topology for ultra-low-power 86ppm/°C 65nm CMOS 6MHz clock reference with amplitude regulation. In William Redman-White, Anthony J. Walton, editors, ESSCIRC 2008 - 34th European Solid-State Circuits Conference, Edinburgh, Scotland, UK, 15-19 September 2008. pages 394-397, IEEE, 2008. [doi]

This author has not been identified. Look up 'Valentijn De Smedt' in GoogleThis author has not been identified. Look up 'Pieter De Wit' in GoogleThis author has not been identified. Look up 'Wim Vereecken' in GoogleThis author has not been identified. Look up 'Michiel Steyaert' in Google

runs on WebDSL