Steven G. Smith, P. B. Denyer. Synthesis of area-efficient VLSI architectures for vector and matrix multiplication. In Mary Jane Irwin, Renato Stefanelli, editors, 8th IEEE Symposium on Computer Arithmetic, ARITH 1987, Como, Italy, May 18-21, 1987. pages 13-20, IEEE, 1987. [doi]
@inproceedings{SmithD87-0,
title = {Synthesis of area-efficient VLSI architectures for vector and matrix multiplication},
author = {Steven G. Smith and P. B. Denyer},
year = {1987},
doi = {10.1109/ARITH.1987.6158718},
url = {http://dx.doi.org/10.1109/ARITH.1987.6158718},
researchr = {https://researchr.org/publication/SmithD87-0},
cites = {0},
citedby = {0},
pages = {13-20},
booktitle = {8th IEEE Symposium on Computer Arithmetic, ARITH 1987, Como, Italy, May 18-21, 1987},
editor = {Mary Jane Irwin and Renato Stefanelli},
publisher = {IEEE},
isbn = {0-8186-0774-2},
}