Abstract is missing.
- A design of time-optimum and register-number-minimum systolic convolverHiroshi Umeo. 5-12 [doi]
- Synthesis of area-efficient VLSI architectures for vector and matrix multiplicationSteven G. Smith, P. B. Denyer. 13-20 [doi]
- Implementation of the single modulus complex ALURom-Shen Kao, Fred J. Taylor. 21-27 [doi]
- Vector computations on an orthogonal memory access multiprocessing systemIsaac D. Scherson, Yiming Ma. 28-37 [doi]
- Structured arithmetic tiling of integrated circuitsTony M. Carter. 41-48 [doi]
- Fast area-efficient VLSI addersTack-Don Han, David A. Carlson. 49-56 [doi]
- Area-time efficient arithmetic elements for VLSI systemsRamautar Sharma. 57-62 [doi]
- Parallel multipliers based on horizontal compressorsLuigi Ciminiera. 63-69 [doi]
- Algorithm for high speed shared radix 4 division and radix 4 square-rootJan Fandrianto. 73-79 [doi]
- Design of high speed MOS multiplier and divider using redundant binary representationShigeo Kuninobu, Tamotsu Nishiyama, Hisakazu Edamatsu, Takashi Taniguchi, Naofumi Takagi. 80-86 [doi]
- Fast multiply and divide for a VLSI floating-point unitBidyut Kumar Bose, Li-fan Pei, George S. Taylor, David A. Patterson. 87-94 [doi]
- On the implementation of shifters, multipliers, and dividers in VLSI floating point unitsVictor Peng, Sridhar Samudrala, Moshe Gavrielov. 95-102 [doi]
- The FELIN arithmetic coprocessor chipMichel Cosnard, Alain Guyot, Bertrand Hochet, Jean-Michel Muller, H. Ouaouicha, P. Paul, E. Zysman. 107-112 [doi]
- CORDIC arithmetic for an SVD processorJoseph R. Cavallaro, Franklin T. Luk. 113-120 [doi]
- Evaluating elementary functions with Chebyshev polynomials on pipeline netsKai Hwang, H. C. Wang, Z. Xu. 121-128 [doi]
- Toward an ideal computer arithmeticThomas E. Hull, Marty S. Cohen. 131-138 [doi]
- A closed computer arithmeticF. W. J. Olver. 139-143 [doi]
- Implementation of level-index arithmetic using partial table look-upF. W. J. Olver, Peter R. Turner. 144-147 [doi]
- On error analysis in arithmetic with varying relative precisionJames Demmel. 148-152 [doi]
- A new real number representation and its operationHozumi Hamada. 153-157 [doi]
- Systolic solution of linear systems over GF(p) with partial pivotingBertrand Hochet, Patrice Quinton, Yves Robert. 161-168 [doi]
- Systolic & semi-systolic digit serial multipliersPoras T. Balsara, Robert Michael Owens. 169-173 [doi]
- Systolic up/down counters with zero and sign detectionBehrooz Parhami. 174-178 [doi]
- A radix-4 on-line division algorithmPaul K.-G. Tu, Milos D. Ercegovac. 181-187 [doi]
- A novel floating-point online division algorithmHai Xiang Lin, Henk J. Sips. 188-195 [doi]
- On-line scheme for computing rotation factorsMilos D. Ercegovac, Tomás Lang. 196-203 [doi]
- A bit-serial arithmetic unit for rational arithmeticPeter Kornerup, David W. Matula. 204-211 [doi]
- A normalization algorithm for truncated p-adic arithmeticAttilio Colagrossi, Alfonso Miola. 212-216 [doi]
- Protecting convolution-type aritmetic array calculations with generalized cyclic codesG. Robert Redinbo. 219-225 [doi]
- Error detection and correction for addition and subtraction, through use of higher radix extensions of hamming codesJames E. Robertson. 226-229 [doi]
- Fault-tolerant systolic arrays: An approach based upon residue arithmeticVincenzo Piuri. 230-238 [doi]
- A formal approach to roundingGeoff Barrett. 247-254 [doi]
- The development of a floating-point validation packageJ. Du Croz, M. Pont. 255 [doi]
- Arithmetic for vector processorsReinhard Kirchner, Ulrich W. Kulisch. 256-269 [doi]
- Computer arithmetic and ill-conditioned algebraic problemsGunter Schumacher. 270-276 [doi]