Micro-operation cache: a power aware frontend for variable instruction length ISA

Baruch Solomon, Avi Mendelson, Ronny Ronen, Doron Orenstein, Yoav Almog. Micro-operation cache: a power aware frontend for variable instruction length ISA. IEEE Trans. VLSI Syst., 11(5):801-811, 2003. [doi]

Abstract

Abstract is missing.