High performance fault tolerance through predictive instruction re-execution

Jyothish Soman, Timothy M. Jones 0001. High performance fault tolerance through predictive instruction re-execution. In IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2017, Cambridge, United Kingdom, October 23-25, 2017. pages 1-4, IEEE, 2017. [doi]

@inproceedings{Soman017,
  title = {High performance fault tolerance through predictive instruction re-execution},
  author = {Jyothish Soman and Timothy M. Jones 0001},
  year = {2017},
  doi = {10.1109/DFT.2017.8244459},
  url = {http://doi.ieeecomputersociety.org/10.1109/DFT.2017.8244459},
  researchr = {https://researchr.org/publication/Soman017},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2017, Cambridge, United Kingdom, October 23-25, 2017},
  publisher = {IEEE},
  isbn = {978-1-5386-0362-8},
}