Junyoung Song, Hyun-Woo Lee, Sewook Hwang, Chulwoo Kim. A 10 Gbits/s/pin DFE-Less Graphics DRAM Interface With Adaptive-Bandwidth PLL for Avoiding Noise Interference and CIJ Reduction Technique. IEEE Trans. VLSI Syst., 25(1):344-353, 2017. [doi]
@article{SongLHK17,
title = {A 10 Gbits/s/pin DFE-Less Graphics DRAM Interface With Adaptive-Bandwidth PLL for Avoiding Noise Interference and CIJ Reduction Technique},
author = {Junyoung Song and Hyun-Woo Lee and Sewook Hwang and Chulwoo Kim},
year = {2017},
doi = {10.1109/TVLSI.2016.2580713},
url = {http://dx.doi.org/10.1109/TVLSI.2016.2580713},
researchr = {https://researchr.org/publication/SongLHK17},
cites = {0},
citedby = {0},
journal = {IEEE Trans. VLSI Syst.},
volume = {25},
number = {1},
pages = {344-353},
}