24.3 A 3nm Gate-All-Around SRAM Featuring an Adaptive Dual-BL and an Adaptive Cell-Power Assist Circuit

Taejoong Song, Woojin Rim, Hoonki Kim, Keun Hwi Cho, Taeyeong Kim, Taejung Lee, Geumjong Bae, Dong-Won Kim, S. D. Kwon, Sanghoon Baek, Jonghoon Jung, Jongwook Kye, Hakchul Jung, HyungTae Kim, Soon-Moon Jung, Jaehong Park. 24.3 A 3nm Gate-All-Around SRAM Featuring an Adaptive Dual-BL and an Adaptive Cell-Power Assist Circuit. In IEEE International Solid-State Circuits Conference, ISSCC 2021, San Francisco, CA, USA, February 13-22, 2021. pages 338-340, IEEE, 2021. [doi]

Abstract

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