Signal and Power Integrity IO Buffer Modeling Under Separate Power and Ground Supply Voltage Variation of the Input and Output Stages

Malek Souilem, Nawel Zgolli, Telmo Reis Cunha, Wael Dghais, Belgacem Hamdi. Signal and Power Integrity IO Buffer Modeling Under Separate Power and Ground Supply Voltage Variation of the Input and Output Stages. IEEE Trans. VLSI Syst., 31(6):874-886, June 2023. [doi]

Abstract

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