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Tolga Soyata, Eby G. Friedman, James H. Mulligan Jr.. Integration of Clock Skew and Register Delays into a Retiming Algorithm. In ISCAS. pages 1483-1486, 1993.
Possibly Related PublicationsThe following publications are possibly variants of this publication: Retiming with non-zero clock skew, variable register, and interconnect delayTolga Soyata, Eby G. Friedman. iccad 1994: 234-241 [doi] Monotonicity Constraints on Path Delays for Efficient Retiming with Localized Clock Skew and Variable Register DelayTolga Soyata, Eby G. Friedman, James H. Mulligan Jr.. iscas 1995: 1748-1751
The following publications are possibly variants of this publication: