Gate Delay Modeling with Multiple Input Switching for Static (Statistical) Timing Analysis - researchr publication

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Jayashree Sridharan, Tom Chen. Gate Delay Modeling with Multiple Input Switching for Static (Statistical) Timing Analysis. In 19th International Conference on VLSI Design (VLSI Design 2006), 3-7 January 2006, Hyderabad, India. pages 323-328, IEEE Computer Society, 2006. [doi]

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