Region based cache coherence for tiled MPSoCs

Akshay Srivatsa, Sven Rheindt, Thomas Wild, Andreas Herkersdorf. Region based cache coherence for tiled MPSoCs. In Massimo Alioto, Hai Helen Li, Jürgen Becker, Ulf Schlichtmann, Ramalingam Sridhar, editors, 30th IEEE International System-on-Chip Conference, SOCC 2017, Munich, Germany, September 5-8, 2017. pages 286-291, IEEE, 2017. [doi]

@inproceedings{SrivatsaRWH17,
  title = {Region based cache coherence for tiled MPSoCs},
  author = {Akshay Srivatsa and Sven Rheindt and Thomas Wild and Andreas Herkersdorf},
  year = {2017},
  doi = {10.1109/SOCC.2017.8226059},
  url = {https://doi.org/10.1109/SOCC.2017.8226059},
  researchr = {https://researchr.org/publication/SrivatsaRWH17},
  cites = {0},
  citedby = {0},
  pages = {286-291},
  booktitle = {30th IEEE International System-on-Chip Conference, SOCC 2017, Munich, Germany, September 5-8, 2017},
  editor = {Massimo Alioto and Hai Helen Li and Jürgen Becker and Ulf Schlichtmann and Ramalingam Sridhar},
  publisher = {IEEE},
  isbn = {978-1-5386-4034-0},
}