Martin Straka, Jan Kastil, Zdenek Kotásek. SEU Simulation Framework for Xilinx FPGA: First Step towards Testing Fault Tolerant Systems. In 14th Euromicro Conference on Digital System Design, Architectures, Methods and Tools, DSD 2011, August 31 - September 2, 2011, Oulu, Finland. pages 223-230, IEEE, 2011. [doi]
Abstract is missing.